How IBM invented semiconductor manufacturing automation

In 1970, Bill Harding envisioned a fully automated wafer-fabrication line that would produce integrated circuits in less than one day. Not only was such a goal gutsy 54 years ago, it would be bold even in today’s billion-dollar fabs, where the fabrication time of an advanced IC is measured in weeks, not days. Back then, ICs, such as random-access memory chips, were typically produced in a monthlong stop-and-go march through dozens of manual work stations.

At the time, Harding was the manager of IBM’s Manufacturing Research group, in
East Fishkill, N.Y. The project he would lead to make his vision a reality, all but unknown today, was called Project SWIFT. To achieve such an amazingly short turnaround time required a level of automation that could only be accomplished by a paradigm shift in the design of integrated-circuit manufacturing lines. Harding and his team accomplished it, achieving advances that would eventually be reflected throughout the global semiconductor industry. Many of SWIFT’s groundbreaking innovations are now commonplace in today’s highly automated chip fabrication plants, but SWIFT’s incredibly short turnaround time has never been equaled.

SWIFT averaged 5 hours to complete each layer of its fabrication process, while the fastest modern fabs take 19 hours per processing layer, and the industry average is 36 hours. Although today’s integrated circuits are built with many more layers, on larger wafers the size of small pizzas, and the processing is more complex, those factors do not altogether close the gap. Harding’s automated manufacturing line was really, truly, swift.

A Semiconductor Manufacturing Manifesto

I encountered Harding for the first time in 1962, and hoped it would be the last.
IBM was gearing up to produce its first completely solid-state computer, the System/360. It was a somewhat rocky encounter. “What the hell good is that?” he bellowed at me as I demonstrated how tiny, unpackaged semiconductor dice could be automatically handled in bulk for testing and sorting.

Author Jesse Aronstein [at far right, in top photo] took a break from managing the equipment group of Project SWIFT to play French horn one evening a week with the Southern Dutchess Pops Orchestra. Another key manager, Walter J. “Wally” Kleinfelder [bottom left], standing at right, headed the process group of Project SWIFT. William E. “Bill” Harding [bottom right], seen here in 1973, was a brusque WW II combat veteran and creative innovator. He conceived and directed IBM’s Project SWIFT, which succeeded in fabricating integrated circuits in one day.Clockwise from top: IBM/Computer History Museum; IBM (2)

William E. (“Bill”) Harding was an innovative thinker and inventor. He had been developing semiconductors and their manufacturing technology at IBM for three years when the company’s new Components Division was formed in 1961. Harding became a midlevel manager in the new division, responsible for developing and producing the equipment required to manufacture the System/360’s solid-state devices and circuit modules.

He was rough around the edges for an IBM manager. But perhaps it was to be expected of someone who had grown up in Brooklyn, N.Y., and was wounded three times in combat in World War II while serving in General George S. Patton’s Third Army. After the war, Harding earned bachelor’s and master’s degrees in mathematics and physics and became a member of IEEE.

I joined IBM in 1961, coming from rocket-engine development at General Electric. Like most engineers at the time, I knew nothing about semiconductor manufacturing. Five years prior, I had attended a vacuum-tube electronics course in which the professor described the transistor as “a laboratory curiosity, which may or may not ever amount to anything.”

Project SWIFT occupied a small space, shown here in yellow, in building 310 at IBM’s sprawling East Fishkill semiconductor facility. IBM

Harding’s rough and crude manner surfaced every time I crossed paths with him. If he ever went to IBM
“charm school” (management training), there was no discernible evidence of it. Nevertheless, he succeeded in his mission. By 1964, solid-state logic modules for System/360s were flowing from the Components Division’s new facility on a former farm in East Fishkill.

In July 1970, I returned to IBM after three years of graduate study. I was a first-level manager for four years prior to that educational break, and did not want another management job. I wanted a purely technical career, and I joined East Fishkill’s Manufacturing Research (MR) group hoping to get one.

Harding and I then crossed paths again. In mid-August of 1970, he became MR’s top manager. Prior to that, he spent a year developing an IBM corporate strategy for the future manufacturing and use of
very-large-scale integrated (VLSI) circuits. He was given command of MR to demonstrate the viability of his manufacturing concepts.

An assembly of MR personnel was convened to announce the management change. After being introduced, Harding described his view of future VLSI applications and manufacturing. These were his key points:

• VLSI circuits would be based on field-effect transistor technology (at the time, bipolar-junction transistors were dominant);
• Defect-free high yields would be paramount;
• Manufacturing would be fully automated;
• Best results would accrue from processing one wafer at a time;
• Short turnaround times would confer important benefits;
• Volume would scale up by replicating successful production lines.

After the educational lecture, Harding changed from professor to commander, General Patton–style. MR’s sole mission was to demonstrate Harding’s ideas, and ongoing projects not aligned with that goal would be transferred elsewhere within IBM or abandoned. MR would prove that an automated system could be constructed to process about 100 wafers a day, one at a time, with high yield and a one-day turnaround time.

What? Did I hear that right? One-day turnaround from bare wafer to finished circuits was what we would now call a moon shot. Remember, at the time, it typically took more than a month. Did he really mean it?

Harding knew that it was theoretically possible, and he was determined to achieve it. He declared that IBM would have a substantial competitive advantage if prototype experimental IC designs could be produced in a day, instead of months. He wanted the circuit designer to have testable circuits the day after submitting the digital description to the production line.

One-day turnaround from bare wafer to finished circuits was what we would now call a moon shot.

Harding immediately organized an equipment group and a process group within MR, naming me to manage the equipment group. I did not want to be a manager again. Now, reluctantly, I was a second-level manager, responsible for developing all the processing and wafer-handling equipment for a yet-to-be-defined manufacturing line that I had barely started to visualize. My dream research job had lasted little more than a month.

Walter J. (“Wally”) Kleinfelder transferred into MR to manage the process group. They would select the product to manufacture and define the process by which it would be made—the detailed sequence of chemical, thermal, and lithographic steps required to take a blank silicon wafer and build integrated circuits on its surface at high yield.

Kleinfelder selected a random-access memory chip, the IBM RAM II, for our demonstration. This product was being produced on-site at East Fishkill, so we would have everything we needed to build it and evaluate our results relative to those of the existing nonautomated manufacturing line.

IBM’s SWIFT Pilot Wafer Fab Had a Monorail “Taxi”

Integrated-circuit manufacturing involves first creating the transistors and other components in their proper places on the silicon wafer surface, and then wiring them together by adding a thin film of aluminum selectively etched to create the required wiring pattern. That thin film of conductor is known as the wiring, or metallization, layer.

IC manufacturing uses
photolithography to create the many layers, each with a distinctive pattern, needed to fabricate an IC. These include the metal wiring layers, of which there can be more than a dozen for an advanced chip today. For these steps, the metal layer on the wafer is coated with a light-sensitive photoresist material, after which an image of the pattern is exposed on to it. The areas where conductors will be formed are blocked from the light. When the image is developed, the resist is removed from the pattern areas that were exposed, enabling these areas to be etched by an acid. The rest of the surface remains protected by the acid-proof resist. After etching is completed, the remaining protective resist is removed, leaving just the wiring layer in the required pattern.

The IC process also uses lithography to create transistors and other components on the silicon wafer. Here, openings are etched in insulating layers through which tiny amounts of specific impurities can be infused into the exposed spots of pure silicon to change the electrical properties. Producing the RAM-II ICs required four separate lithographic operations using four different patterns: three for creating the transistors and other components, and one to create the metal wiring layer. The four patterns had to be exactly aligned with one another to successfully create the chips.

Lithography is only part of the IC manufacturing process, however. In the existing production line, it took many weeks to process a RAM-II wafer. But the raw process time—the time a wafer spent actually being worked on at various thermal, lithographic, chemical, and deposition stations—was less than 48 hours. Most of a wafer’s time was spent waiting to undergo the next process step. And some steps, chemical cleaning in particular, could be eliminated if wafers progressed quickly from one step to the next.

It was the responsibility of Kleinfelder’s group to determine which steps could be eliminated and which could be accelerated. The resulting raw process time was less than 15 hours. It then fell to
Maung Htoo, my manager of chemical-equipment development, to test the proposed process. His people hustled 1.25-inch-diameter wafers through a “pots and pans” lab setup to evaluate and refine it. The abbreviated procedure successfully produced working circuits in about 15 hours, as anticipated.

The architecture of an automated system materialized. It was initially envisioned as a series of linked machines, each performing one step of the process, like an automobile assembly line. But equipment downtime for preventative maintenance and repair of breakdowns had to be accommodated. This was achieved by the insertion of short-term storage “buffers” that would temporarily store wafers at selected points in the process chain when necessary.

This process chain concept was further disrupted by considerations related to lithographic-pattern imaging. Exposure of the photoresist on wafers was commonly accomplished at the time by a process analogous to photographic contact printing. The lithographic mask, through which light shone when exposing the photoresist, was the equivalent of a photographic negative. Any defect or particle on the mask would result in a corresponding defect on a chip, at the same location, wafer after wafer.

The East Fishkill lithography group had developed a noncontact 10:1 reduction
step-and-repeat image projector. Think of it as a sort of photographic slide projector that produced a shrunken image containing the pattern for a single layer on a chip. It then “stepped” across the wafer, exposing one chip location at a time. Relative to contact masking, the stepper promised lower sensitivity to particulate contamination, because the size of the shadow of any stray particle would be reduced by 10:1. Other advantages included higher optical resolution and longer mask life.

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Because it was slow, though, multiple steppers would be needed to meet the throughput target. Achieving the best pattern alignment on each wafer for multiple pattern exposures required that a wafer be routed back to the same stepper for exposure of each layer in the process chain. That would cancel the effect of image distortions introduced by slight variations from one machine to another. Building the RAM-II circuits then required that a wafer make four separate trips to its assigned stepper. That divided the linear sequence into five sectors. A monorail “taxi” would take a wafer from one processing sector to its assigned stepper, and return later to take it to its next sector.

Each of the five sectors was envisioned to be an enclosure containing all of the automated wafer-processing and handling equipment required to accomplish that segment of the process chain. The sector enclosures and the taxi would be designed to provide a clean-room-quality local environment for the wafers. Within a sector enclosure, typically, a wafer would pass directly from a wet-chemistry module to miniature furnaces to a photoresist application module, and, finally, to the taxi pickup port. Inside the wet-chemistry module, for example, the wafer would undergo cleaning, development of the photoresist and its removal, and etching, among other procedures.

Control of the entire line was to be accomplished at three levels. Overall production-line management, recordkeeping, taxi logistics, and process monitoring would be handled by a central computer-based system. Dedicated controllers, one for each sector, would manage wafer logistics within the sector and feed wafer traffic and processing data to the central system. The individual processing and wafer-handling modules inside each sector enclosure would have their own specialized controls, as needed, for independent setup and maintenance.

Finally configured, our automated demonstration line for the RAM-II chips would consist of five sectors, a taxi, and a lithographic-pattern imaging center, all managed by computer. Six months after Harding took command, MR started to design and build the actual system.

The Brash Middle Manager Found Inspiration in Literature

Harding made frequent trips to
IBM’s headquarters, in Armonk, N.Y., to report progress, request resources, rebut challenges, and convince the top brass that the money being spent was a good investment in the future. It was a tough mission. His lengthy weekly staff meetings often reflected the pressure he was under. He lectured at length on things he knew we knew, told allegorical stories, and spun analogies.

At the time, I did not realize that he was using his staff meetings to develop and refine ideas for the presentations at Armonk. He was noting our reactions and adjusting his presentation ideas accordingly. His presentations to the top brass were effective. For the duration of the project, spanning about three years, MR had all the funding and support it needed to develop, design, build, and operate the entire system.

At one staff meeting, Harding read aloud Heywood Broun’s short story “
The 51st Dragon,” to emphasize the power of a name or slogan to motivate people to achieve the impossible. His point, of course, was that we needed a really good name for the project. “SWIFT” was eventually chosen. Harding always insisted that it was not an acronym, but nevertheless people figured it was shorthand for “Semiconductor Wafer Integrated Factory Technology.”

SWIFT’s incredibly short turnaround time has never been equaled.

SWIFT’s processing and wafer-handling equipment was custom designed entirely within IBM’s Components Division. The primary design objectives were to process wafers automatically, consistently, and uniformly and keep them clean and undamaged. Wafer-handling experiments sorted out the cleanest and gentlest techniques. Handling equipment was designed to support the wafer rather than grip it. A novel wafer handler that used a flow of air above the wafer to lift it, without physical contact, was successfully incorporated for some of the wafer-transport moves.

There was one exception to the “clean and gentle” design of SWIFT’s handling apparatus. Management at the Components Division’s Burlington, Vt., site pressured Harding to use “air-track” wafer-transport equipment that they had developed. This equipment used airflow to lift and move wafers, much like a puck in a game of air hockey. Harding needed Burlington’s continued support, so he decreed that some air-track equipment be used in SWIFT. And it was, even though wafer-contamination and reliability questions were unresolved.

Another top-down decree explains why SWIFT ended up with two different types of sector control systems—the antithesis of good design for maintainability. A custom controller had been designed, and five units were being built (one for each sector), when HQ required that we incorporate the newly announced
IBM System/7, which had been developed specifically for factory-equipment and process-control applications. After all, if IBM itself didn’t use the computer in its own advanced production line, potential customers would wonder “why not?” But if SWIFT used a System/7 and the project proved to be successful, it would help sell System/7s. And so for the five sectors, SWIFT ended up with four custom controllers and one System/7. Both types worked well.

Equipment reliability was SWIFT’s Achilles’ heel. To help achieve high reliability and ease of maintenance, certain mechanisms and controls were standardized for use throughout the system, and they were chosen for reliability and simplicity rather than novelty or elegance. For example, a person observing the system in operation would notice that many motions were accomplished in discrete smooth steps rather than a single traverse. Underlying that peculiarity was the extensive use of the simple, robust, and reliable
Geneva drive, originally developed centuries ago for clocks, but now adapted for linear and rotary motions that had to be smooth and precisely locked in at the end points. Each easily controlled turn of the Geneva drive’s input shaft made one step. Long traverses required multiple turns of the shaft, resulting in the odd-looking motions.

Inside a sector’s enclosed chamber, a wafer went through a series of entirely automated processing steps. Two of the early concept sketches are represented here. The wafers came into the upper chamber with a pattern exposed onto the resist and underwent a series of processing steps that included development, hardening, etching, and others, as indicated.

Another simplification involved spinning the wafers to centrifugally spread liquid photoresist that was dropped onto the center of the wafer. In existing lines, “wrong spin speed” was frequently cited as the cause of resist-related wafer-processing rejects. Spin speed was eliminated as a variable by driving SWIFT’s spinners with synchronous AC motors locked to 3,600 rpm by their 60-hertz AC power source, just as phonograph turntables are driven. No speed controllers would be required. The desired photoresist film thickness would be achieved by adjusting the remaining variables—temperature, viscosity, and/or spin time. In the end, system reliability was improved by the elimination of four separate speed controllers.

As SWIFT progressed from blue-sky concept to actual hardware implementation, Harding adjusted MR’s organization and gained the cooperation of supporting groups. He saw to it that his people had the resources to do the job and could focus on the project. I came to admire his organizational skills and his ability to single out and recruit top-notch talent from within the company.

Harding established a group to develop SWIFT’s master control system, which monitored the progress on each and every wafer as it moved through the sectors. This Execution Control System (ECS) was based on an
IBM 1800. Each wafer had a serial number and was tracked at every step through the line. The ECS stored and monitored each wafer’s processing parameters, detecting and reacting quickly to out-of-spec situations. Its punch cards and tape cartridges seem quaint by today’s measure, but it was a major advance in production control and monitoring for a wafer line.

He also transferred an entire instrumentation department, managed by Sam Campbell, from IBM Endicott to East Fishkill. Campbell’s department subsequently developed groundbreaking methods for real-time, in-situ process control for SWIFT.

A Short Life but an Enduring Legacy in Semiconductor Manufacturing

Mockups of furnaces and chemical processors were built and tested.
Robert J. Straub’s department in East Fishkill’s Manufacturing Engineering group designed and built the sectors and the processing equipment modules within them. Harding brought in Bevan P.F. Wu to manage the installation, debugging, and operation of the line. As equipment and facilities coalesced in SWIFT’s dedicated 4,000-square-foot space, Rolf H. Brunner, who had managed a good portion of the sector designs along with development of the vacuum metal-deposition equipment, took responsibility under Wu for equipment installation, startup, and debugging.

Only one operation in the entire process was not fully automated. Alignment of the wafer for exposing the pattern on the photoresist still depended on a well-trained operator. In its final form, SWIFT had both a 10:1 optical stepper and also a 1:1 contact-mask machine, but as it happened, most of the chips produced were with the 1:1 machine, because the throughput was higher that way.

By the end of 1973, IBM HQ was already convinced that full automation of wafer processing could succeed. So much so that this goal was adopted as a primary objective for a new wafer-processing line to produce the circuits for IBM’s next-generation computer, the “FS” (
Future System). The proposed new line was dubbed “FMS” (Future Manufacturing System), and SWIFT was renamed “FMS Feasibility Line.”

Bevan Wu successfully managed the line’s completion, test runs, personnel training, and refinements of equipment, process, and procedures. He brought the line to the point of being qualified to produce circuits for IBM products. The system made five continuous-operation runs between mid-1974 and early 1975. Between runs, his group analyzed results and implemented improvements. The longest continuous run spanned 12 days. Wafer throughput averaged 58 wafers per day, 83 percent of its designed maximum. Average turnaround time from bare-wafer input to testable-circuits output was about 20 hours. The raw process time was 14 hours. The yield ultimately equaled the best ever achieved by East Fishkill’s conventional RAM-II production line.

A total of 135 technicians, engineers, and managers from IBM locations worldwide were trained on the operation of the system. They produced 600 product-quality wafers with 17,000 RAM-II FET memory chips.

But like his WWII commander, General Patton, Harding was bypassed to lead “the big show”—in Harding’s case, the creation of the new FMS automated line. Leaving the management career ladder behind, he was promoted to IBM Fellow, the highest nonmanagement level in the company.

The FMS Feasibility Line, originally SWIFT, made its last continuous run in early 1975. It had accomplished its objectives. Its people were now needed to help create the FMS line to produce FS computers. But later in 1975, the FS project was canceled, and FMS became superfluous. A portion of the equipment destined for FMS became East Fishkill’s
QTAT (Quick Turn Around Time) line, a groundbreaking IBM showpiece that is better remembered than its obscure predecessor, Project SWIFT.

Although SWIFT’s life was short, and it was never in the limelight, its many innovations are clearly visible in today’s semiconductor fabs. Like SWIFT, these fabs are highly automated and computer controlled; have a central transport system and “Bernoulli” handlers, which exploit the flow of air to lift wafers without making physical contact; apply resist immediately after oxide or metal film formation; use steppers for lithographic pattern exposure; and employ real-time process control. All of these were groundbreaking features of Project SWIFT 50 years ago.

The experience of working under Harding on SWIFT for three years was, for me, transformative. What had started with trepidation ended with admiration. I have come to consider Bill Harding a true genius, in his own way. Spurred on and supported by his unique management style, a small group of dedicated people achieved far more than anyone initially envisioned. More than even we ourselves thought possible.

We think of the first achievers in an industry as the “fathers” of the modern embodiment of their inventions. Edison, Bell, Ford, and the Wright brothers, are commonly spoken of this way. In that sense, William E. Harding is clearly the father of the modern, automated, billion-dollar fab.